1. Field of the Invention
The present invention generally relates to a method for providing communications between various components in an electronic device, such as a computer system, by using a low power interconnection or bus, and more particularly to such a method and apparatus which utilize magnetoresistive elements to reduce power dissipation.
2. Description of Related Art
Modern electronic circuits use many different types of logic components (e.g., processing units) to carry out numerous functions. These circuits require a multitude of conductive pathways, or buses, to provide communications or connectivity between the logic components. A communications bus (transmission line) may be used to transmit certain values, such as data which are input to a logic component, or instructions used by the logic components, and further may be used to transmit various control signals. Buses can be unidirectional, bidirectional, or broadcast (used to interconnect three or more devices and allow simultaneous or sequential access to information or controls conveyed on the bus). These buses may be external, e.g., laid out on a printed circuit board, and interconnecting two or more devices which are separately packaged. They may also be internal, interconnecting two or more devices which are fabricated in a single package, such as an integrated circuit (IC).
Buses are used to interconnect devices for a wide variety of applications, including communications between complex computer components such as microprocessors, application specific integrated circuits (ASICs), peripheral devices, random-access memory, etc. Several different external bus designs have been developed for interconnecting various computer components. Early designs include the "expansion" bus referred to as the XT bus, and the later AT bus (also referred to as the Industry Standard Architecture (ISA) bus). A 32-bit extension to this bus was later created, which is referred to as the Extended Industry Standard Architecture (EISA). Another well-known external bus design is the Peripheral Component Interconnect (PCI) bus.
In addition to the foregoing external buses, many computer components use internal buses. For example, the PowerPC.TM. processor marketed by International Business Machines Corp. (IBM--assignee of the present invention) has a processing core which is connected to an instruction cache and a data cache. These caches temporarily store values that might be repeatedly accessed by the processor core, in order to speed up processing by avoiding the longer step of loading the values from the computer system's main memory. The instruction and data caches are "on-board," that is, fabricated on the same substrate (chip). An internal bus is provided which connects the instruction cache to a branch unit (the branch unit determines what sequence of instructions is appropriate, and forwards the ordered instructions to a dispatch unit in the processor core). A separate internal bus connects the data cache to one or more load/store units, which retrieve existing data, or store modified data, according to the associated instruction. In some high-end processors, these internal buses are now as large as 128 bits.
One problem that has arisen in the design of communications buses relates to power dissipation. Conventional buses use a hard-wired path to connect the various components, and the impression of voltages on the transmission lines results in power dissipation due to the characteristic impedance of the lines. Power loss is of particular concern with internal buses.
For example, in a high-speed bus (a clock speed of 100 MHz or more, and particularly above 1 GHz), the power dissipation P.sub.v that occurs during activation of a single line is approximately equal to V.sup.2 /Z.sub.0, where Z.sub.0 is the characteristic impedance of the line, and V is the voltage applied to the line to generate an active (high) signal. If such a bus has an impedance Z.sub.0 of about 50 .OMEGA. (typical of prior art on-board buses), and it uses a common supply voltage (V.sub.dd) of 1-2 volts to energize the bus, then the resulting power dissipation is at least 20 milliwatts per interconnect. Therefore, just one 128-bit bus can result in a power loss of 2.5 watts. The magnitude of this loss is very significant given the microscopic dimensions of the processor and the confined space in its packaging. The concomitant increase in temperature in the area surrounding the bus can be damaging to other elements of the circuit. Excess power consumption also becomes an issue with portable devices that use batteries.
Another problem with conventional buses is the creation of ground loops between the transmitting (source) end and the receiving (load) end of the bus. Ground loops can result in increased power loss, and ground "bounce" which introduce noise into the line.
In light of the foregoing, it would be desirable to devise a communications bus for a computer system which reduced power dissipation during activation of a transmission line. It would be further advantageous if the bus could avoid ground loops between the source and load ends of the bus.